This disclosure relates to a vertical semiconductor device, and more particularly, to a vertical semiconductor memory device.
As a degree of integration of a memory device increases, a memory device having a vertical transistor structure has been suggested instead of a conventional memory device having a planar transistor structure. Conventional memory devices having vertical transistors include recesses formed in a substrate when a channel hole is formed. These recesses may affect the manufacturing process to cause an undesirable reduction of cell current in the memory device. It would thus be beneficial to improve this reduction of cell current.